In the prior art, computer circuits request access to each other to accomplish different functions associated with processing. These requests usually occur asynchronously. For example, use of a memory may be requested by a processor via a bus or may be requested by an input/output device via a direct memory access bus which is different than the bus used by the processor. A bus itself is a resource, the use of which is requested by many computer circuits. Whether a circuit or a bus is being accessed by a plurality of circuits, because more than one circuit may request access or use of another circuit, priority resolvers are needed to assure that only one requesting circuit at a time is granted access to a requested circuit, bus or other resource. When there is more than one simultaneous request for the same circuit or resource, the requesting circuit with the highest priority is preferentially granted access to the circuit or resource.
A problem with prior art circuit access priority resolution circuits is that an access grant output from one priority resolution circuit will sometimes be an access request to a second priority resolution circuit. Each priority resolution circuit has a finite period of time in which it performs its function and grant access to one of a plurality of requesting circuits that are simultaneously requesting access to another circuit or resource. Only after a decision has been made and access granted to the highest priority requesting circuit to a first priority resolution circuit is an access request made to a second priority resolution circuit. This typical sequence of operations is serial in nature and uses a finite period of time. The finite periods of time involved in priority resolution contribute to limiting the speed of operation of the computer.
Thus, there is a need in the art for a method and apparatus to provide a method and new priority resolver apparatus that can perform its function while shortening the time typically required to connect a requesting circuit to a requested circuit.